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    首页产品索引MC100LVELT20

    MC100LVELT20

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     LVTTL/LVCMOS to Differential LVPECL Translator

    制造商:ON

    产品信息

    The MC100LVELT20 is a 3.3 V TTL/CMOS to differential PECL translator. Because PECL (Positive ECL) levels are used, only +3.3 V and ground are required. The small outline SOIC−8 package and the single gate of the MC100LVELT20 makes it ideal for those applications where space, performance, and low power are at a
    premium.
    The 100 Series contains temperature compensation.
    • 390 ps Typical Propagation Delay
    • Maximum Input Clock Frequency > 0.8 GHz Typical
    • Operating Range VCC = 3.0 V to 3.6 Vwith GND = 0 V
    • PNP TTL Input for Minimal Loading
    • Pb-Free Packages are Available

    电路图、引脚图和封装图

    在线购买

    型号制造商描述购买
    MC100LVELT20DR2GON 立即购买
    MC100LVELT20DGON 立即购买

    技术资料

    标题类型大小(KB)下载
    AC Characteristics of ECL DevicesPDF896 点击下载
    ECL Clock Distribution TechniquesPDF54 点击下载
    The ECL Translator GuidePDF142 点击下载
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 点击下载
    ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 点击下载
    Storage and Handling of Drypack Surface Mount DevicePDF49 点击下载
    Interfacing with ECLinPSPDF72 点击下载
    Termination of ECL Logic DevicesPDF176 点击下载

    应用案例更多案例

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