首页产品索引NB4N840M

    NB4N840M

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     2 x 2 Crosspoint Switch, Dual, 3.3 V, 3.2 Gb / s, with CML Outputs

    制造商:ON

    中文数据手册

    产品信息

    The NB4N840M is a high−bandwidth fully differential dual 2 x 2 crosspoint switch with CML inputs/outputs that is suitable for applications such as SDH/SONET DWDM and high speed switching. Fully differential design techniques are used to minimize jitter accumulation, crosstalk, and signal skew, which make this device ideal for loop−through and protection channel switching applications.
    Internally terminated differential CML inputs accept AC−coupled LVPECL (Positive ECL) or direct coupled CML signals. By providing internal 50 Ohm input and output termination resistor, the need for external components is eliminated and interface reflections are minimized. Differential 16 mA CML outputs provide matching internal 50 Ohm terminations, and 400 mV output swings when externally terminated, 50 Ohm to VCC.
    Single−ended LVCMOS/LVTTL SEL inputs control the routing of the signals through the crosspoint switch which makes this device configurable as 1:2 fan−out, repeater or 2 x 2 crosspoint switch. The device is housed in a low profile 5 x 5 mm 32−pin QFN package.
    • Plugin compatible to the MAX3840 and SY55859L
    • Maximum Input Clock Frequency 2.7 GHz
    • Maximum Input Data Frequency 3.2 Gb/s
    • 225 ps Typical Propagation Delay
    • 80 ps Typical Rise and Fall Times
    • 7 ps Channel to Channel Skew
    • 430 mW Power Consumption
    • 7 ps PeaktoPeak Data Dependent Jitter
    • Power Saving Feature with Disabled Outputs
    • Operating Range: V
    • = 3.0 V to 3.6 V with V
    • = 0 V
    • CML Output Level (400 mV PeaktoPeak Output), Differential Output
    • These are Pb-Free Devices

    在线购买

    型号制造商描述购买
    NB4N840MMNTWGONIC CROSSPOINT SW 2 X 2:2 32QFN 立即购买
    NB4N840MMNR4GONIC CROSSPOINT SW 2 X 2:2 32QFN 立即购买
    NB4N840MMNGONIC CROSSPOINT SW 2 X 2:2 32QFN 立即购买

    技术资料

    标题类型大小(KB)下载
    AC Characteristics of ECL DevicesPDF896 点击下载
    ECL Clock Distribution TechniquesPDF54 点击下载
    Interfacing with ECLinPSPDF72 点击下载
    Termination of ECL Logic DevicesPDF176 点击下载
    Thermal Analysis and Reliability of WIRE BONDED ECLPDF119 点击下载
    Clock Generation and Clock and Data Marking and Ordering Information GuidePDF71 点击下载
    Board Mounting Notes for Quad Flat-Pack No-Lead Package (QFN)PDF40 点击下载
    Termination and Interface of ON Semiconductor ECL Logic Devices with CML (Current Mode Logic) Output StructurePDF144 点击下载

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