The NB7V585M is a differential 1-to-6 CML clock/data distribution chip featuring a 2:1 Clock/Data input multiplexer with an input select pin. The INx/INxb inputs incorporate internal 50-ohm termination resistors and will accept LVPECL, CML, or LVDS logic levels. The NB7V585M produces six identical output copies of clock or dataoperating up to 7GHz or 10.7Gb/s, respectively. As such, NB7V585M is ideal for SONET, GigE, Fiber Channel, Backplane and other clock/data distribution applications. The 16mA differential CML output structure provides matching internal 50-ohm source terminations, 400mV outputswings when externally terminated with a 50-ohm resistor to VCC and is optimized for low skew and minimal jitter. The NB7V585M is powered with either 1.8V or 2.5V supply and is offered in a low profile 5x5mm 32-pin QFN package.

• Maximum Input Data Rate > 10 Gb/s Typical
• Data Dependent Jitter
• Maximum Input Clock Frequency > 6 GHz Typical
• Random Clock Jitter
• Low Skew 1:6 CML Outputs, 30 ps Max
• 2:1 MultiLevel Mux Inputs
• 175 ps Typical Propagation Delay
• 50 ps Typical Rise and Fall Times
• Operating Range: VCC = 1.71 V to 1.89 V
• Internal 50-ohm Input Termination Resistors
• VREFAC Reference Output
• 40C to +85C Ambient Operating Temperature