首页产品索引MC10H135

    MC10H135

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     DualMaster-Slave JK Flip-Flop

    制造商:ON

    中文数据手册

    产品信息

    The MC10H135 is a dual JK master-slave flip-flop. The device is provided with an asynchronous set(s) and reset(R). These set and reset inputs overide the clock.
    A common clock is provided with separate Jbar-Kbar inputs. When the clock is static, the JK bar inputs do not effect the output. The output states of the flip flop change on the positive transition of the clock.
    • Propagation delay, 1.5 ns Typical
    • Power Dissipation, 280 mW mV Typical/Pkg. (No Load)
    • f
    • 250 MHz Max
    • Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range)
    • Voltage Compensated
    • MECL 10K Compatible
    • Pb-Free Packages are Available

    在线购买

    型号制造商描述购买
    MC10H135FNR2GONIC FF JK TYPE DUAL 1BIT 20PLCC 立即购买

    技术资料

    标题类型大小(KB)下载
    AC Characteristics of ECL DevicesPDF896 点击下载
    ECL Clock Distribution TechniquesPDF54 点击下载
    Interfacing Between LVDS and ECLPDF121 点击下载
    Designing with PECL (ECL at +5.0 V)PDF102 点击下载
    The ECL Translator GuidePDF142 点击下载
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 点击下载
    Interfacing with ECLinPSPDF72 点击下载
    Termination of ECL Logic DevicesPDF176 点击下载

    应用案例更多案例

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