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      首页产品索引MC100LVEL92

      MC100LVEL92

      购买收藏
       Translator, Triple PECL Input to LVPECL Output

      制造商：ON

      中文数据手册

      MC100LVEL92datasheet.pdf

      产品信息

      The MC100LVEL92 is a triple PECL input to LVPECL output translator. The device receives standard PECL signals and translates them to differential LVPECL output signals.
      To accomplish the PECL to LVPECL level translation, the MC100LVEL92 requires three power rails. The VCC supply is to be connected to the standard 5 V PECL supply, the LVCC supply is to be connected to the 3.3 V LVPECL supply, and Ground is connected to the system ground plane. Both the V
      and LVCC should be bypassed to ground with 0.01 F capacitors.
      The PECL V
      pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V
      as a switching reference voltage. V
      may also rebias AC coupled inputs. When used, decouple V
      and V
      via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, V
      should be left open.
      • 500ps Propagation Delays
      • 5V and 3.3V Supplies Required
      • ESD Protection: >2 KV HBM, >200 V MM
      • The 100 Series Contains Temperature Compensation
      • LVPECL Operating Range: LVCC = 3.0 V to 3.8 V
      • PECL Operating Range: V
      • = 4.5 V to 5.5 V
      • Internal Input Pulldown Resistors
      • Q Output will Default LOW with Inputs Open or
      • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
      • Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
      • Transistor Count = 247 devices
      • Pb-Free Packages are Available

      电路图、引脚图和封装图

      在线购买

      型号制造商描述购买
      MC100LVEL92DWR2GON 立即购买
      MC100LVEL92DWGON 立即购买

      技术资料

      标题类型大小（KB）下载
      AC Characteristics of ECL DevicesPDF896 点击下载
      ECL Clock Distribution TechniquesPDF54 点击下载
      Interfacing Between LVDS and ECLPDF121 点击下载
      Designing with PECL (ECL at +5.0 V)PDF102 点击下载
      The ECL Translator GuidePDF142 点击下载
      Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 点击下载
      ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 点击下载
      Storage and Handling of Drypack Surface Mount DevicePDF49 点击下载

      应用案例更多案例

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