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    首页产品索引MC100LVEL33

    MC100LVEL33

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     3.3 V ECL ÷·4 Divider

    制造商:ON

    产品信息

    The MC100LVEL33 is an integrated div by 4 divider. The LVEL is functionally equivalent to the EL33 and works from a 3.3 V supply.
    The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the reset allows for the synchronization of multiple LVEL33's in a system.
    The V
    pin, an internally generated voltage supply, is available to this device only. For single-ended inputconditions, the unused differential input is connected toV
    as a switching reference voltage.V
    may also rebias AC coupled inputs. When used, decoupleV
    and V
    via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used,V
    should be left open.
    • 630ps Propagation Delay
    • 4.0 GHz Typical Maximum Frequency
    • ESD Protection: >4 KV HBM, >200 V MM
    • The 100 Series Contains Temperature Compensation
    • PECL Mode Operating Range: V
    • = 3.0 V to 3.8 V with V
    • = 0 V
    • NECL Mode Operating Range: V
    • = 0 V with V
    • = -3.0 V to -3.8 V
    • Internal Input Pulldown Resistors
    • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
    • Moisture Sensitivity Level 1
    • For Additional Information, see Application Note AND8003/D
    • Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
    • Transistor Count = 130 devices
    • Pb-Free Packages are Available

    电路图、引脚图和封装图

    在线购买

    型号制造商描述购买
    MC100LVEL33DTGON 立即购买
    MC100LVEL33DR2GONIC DIVIDER DIV X4 DIFF 8-SOIC 立即购买
    MC100LVEL33DTR2GONMC100LVEL33 是一款集成式 ÷4 分频器。LVEL 功能相当于器件 EL33,但由 3.3V 电源供电。重置引脚是异步的,在上升边进行断言。通电时,内部触发器将达到随机状态;重置可对系统中的多个 LVEL33 进行同步。仅为此器件提供 VBB 引脚,即内部产生的供应电压。对于单端输入的情况, 将未使用的差分输入联接至 VBB, 作为开关参考电压。 VBB 还可将 AC 耦合输入重偏置。使用时,通过 0.01 F 电容器对 VBB 和 VCC 进行去耦合,并将源或汲电流限制为 0.5 mA。不使用时, VBB 应保持开路。 立即购买
    MC100LVEL33DGONMC100LVEL33 是一款集成式 ÷4 分频器。LVEL 功能相当于器件 EL33,但由 3.3V 电源供电。重置引脚是异步的,在上升边进行断言。通电时,内部触发器将达到随机状态;重置可对系统中的多个 LVEL33 进行同步。仅为此器件提供 VBB 引脚,即内部产生的供应电压。对于单端输入的情况, 将未使用的差分输入联接至 VBB, 作为开关参考电压。 VBB 还可将 AC 耦合输入重偏置。使用时,通过 0.01 F 电容器对 VBB 和 VCC 进行去耦合,并将源或汲电流限制为 0.5 mA。不使用时, VBB 应保持开路。 立即购买

    技术资料

    标题类型大小(KB)下载
    AC Characteristics of ECL DevicesPDF896 点击下载
    ECL Clock Distribution TechniquesPDF54 点击下载
    Interfacing Between LVDS and ECLPDF121 点击下载
    Designing with PECL (ECL at +5.0 V)PDF102 点击下载
    The ECL Translator GuidePDF142 点击下载
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 点击下载
    ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 点击下载
    Storage and Handling of Drypack Surface Mount DevicePDF49 点击下载

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