The MC10H/100H680 is a dual supply 4-bit differential ECL bus to TTL bus transceiver. It is designed to allow the system designer to no longer be limited in bus speed associated with standard TTL busses. Using a differential ECL Bus will increase the frequency of operation and increase noise immunity.
Both the TTL and the ECL ports are capable of driving a bus. The ECL outputs have the ability to drive 25 ?, allowing both ends of the bus line to be terminated in the characteristic impedance of 50 ?. The TTL outputs are specified to source 15mA and sink 48 mA, allowing the ability to drive highly capacitive loads.
The ECL output levels are V
approximately equal to -1.0V and V
cutoff equal to -2.0 V (VTT). When the ECL ports are disabled both EIOx and EIOxB go to the V
cutoff level. The ECL input receivers have special circuitry which detects this disabled condition, prevents oscillation, and forces the TTL output to the low state. The noise margin in this disabled state is greater than 600 mV. Multiple ECL V
pins are utilized to minimize switching noise.
The TTL ports have standard levels. The TTL input receivers have PNP input devices to significantly reduce loading. Multiple TTL power and ground pins are utilized to minimize switching noise.
The control pins (EDIR and ECEB) of the 10H version is compatible with MECL 10H ECL logic levels. The control pins of the 100H version are compatible with 100K levels.

• Differential ECL Bus (25
• ) I/O Ports
• High Drive TTL Bus I/O Ports Pin Symbol
• Extra TTL and ECL Power/Ground Pins to Minimize 1 GT1 Switching Noise 2 TIO0
• Dual Supply 3 TDIR
• Direction and Chip Enable Control Pins 4 EDIR 5 EIO0 6 VCCO1
• Pb-Free Packages are Available