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首页产品索引MC100EPT26

MC100EPT26

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2 Fanout Differential LVPECL / LVDS to LVTTL

制造商:ON

中文数据手册

产品信息

The MC100EPT26 is a 1:2 Fanout Differential LVPECL to LVTTL translator. Because LVPECL (Positive ECL) levels are used only +3.3V and ground are required. The small outline 8-lead SOIC package and the 1:2 fanout design of the EPT26 makes it ideal for applications which require the low skew duplication of a signal in a tightly packed PC board.
The V
output allows the EPT26 to be used in a single-ended input mode. In this mode the V
output is tied to the D0bar input for a non-inverting buffer or the D0 input for an inverting buffer. If used, the V
pin should be bypassed to ground via a 0.01 uF capacitator.
  • 1.4ns Typical Propagation Delay
  • Maximum Frequency > 275 MHz Typical
  • The 100 Series Contains Temperature Compensation
  • Operating Range: V
  • = 3.0 V to 3.6 V with GND = 0 V
  • Open Input Default State
  • Safety Clamp on Inputs
  • 24mA TTL outputs
  • Q Outputs will default LOW with inputs open or at V
  • V
  • Output
  • Pb-Free Packages are Available

电路图、引脚图和封装图

在线购买

型号制造商描述购买
MC100EPT26MNR4GON 立即购买
MC100EPT26DR2GONIC XLATOR LVPECL-LVTTL 8-SOIC 立即购买
MC100EPT26DTR2GON 立即购买
MC100EPT26DTGON 立即购买
MC100EPT26DGON 立即购买

技术资料

标题类型大小(KB)下载
AC Characteristics of ECL DevicesPDF896 点击下载
ECL Clock Distribution TechniquesPDF54 点击下载
Interfacing Between LVDS and ECLPDF121 点击下载
Designing with PECL (ECL at +5.0 V)PDF102 点击下载
The ECL Translator GuidePDF142 点击下载
Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 点击下载
ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 点击下载
Storage and Handling of Drypack Surface Mount DevicePDF49 点击下载

应用案例更多案例

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