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    GD32F103C8T6STM32F103C8T6AMS1117-3.3STM32F407VET6OT8JI-111-50M

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    0402WGF1002TCE0402WGF1001TCE0402WGJ0103TCERS-03K1002FTRC0603FR-0710KLRC0402FR-0710KL
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      首页产品索引MC100EL52

      MC100EL52

      购买收藏
       ECLDifferential Clock/Data D Flip-Flop

      制造商：ON

      中文数据手册

      MC100EL52datasheet.pdf

      产品信息

      The MC10EL/100EL52 is a differential data, differential clock D flip-flop with reset. The device is functionally equivalent to the E452 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E452 the EL52 is ideally suited for those applications which require the ultimate in AC performance.
      Data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The differential clock inputs of the EL52 allow the device to also be used as a negative edge triggered device.
      The EL52 employs input clamping circuitry so that under open input conditions (pulled down to V
      ) the outputs of the device will remain stable.
      The 100 Series contains temperature compensation.
      • 365ps Propagation Delay
      • 2.0GHz Toggle Frequency
      • ESD Protection: > 1 KV HBM, > 100 V MM
      • PECL Mode Operating Range: V
      • = 4.2 V to 5.7 V with V
      • = 0 V
      • NECL Mode Operating Range: V
      • = 0 V with V
      • = -4.2 V to -5.7 V
      • Internal Input Pulldown Resistors on D and CLK
      • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
      • Moisture Sensitivity Level 1
      • For Additional Information, see Application Note AND8003/D
      • Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
      • Transistor Count = 48 devices
      • Pb-Free Packages are Available

      在线购买

      型号制造商描述购买
      MC100EL52DR2GONIC FF D-TYPE SNGL 1BIT 8SOIC 立即购买
      MC100EL52DGON 立即购买

      技术资料

      标题类型大小（KB）下载
      AC Characteristics of ECL DevicesPDF896 点击下载
      ECL Clock Distribution TechniquesPDF54 点击下载
      Interfacing Between LVDS and ECLPDF121 点击下载
      Designing with PECL (ECL at +5.0 V)PDF102 点击下载
      The ECL Translator GuidePDF142 点击下载
      Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 点击下载
      ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 点击下载
      Storage and Handling of Drypack Surface Mount DevicePDF49 点击下载

      应用案例更多案例

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