首页产品索引MC100EP91

    MC100EP91

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     PECL to NECL Translator

    制造商:ON

    中文数据手册

    产品信息

    The MC100EP91 is a triple AnyLevel™ positive input to NECL output translator. The device accepts LVPECL, LVTTL, LVCMOS, HSTL, CML or LVDS signals, and translates them to differential NECL output signals.VEE at -3.0 V to -5.5 V.
    • Maximum Input Clock Frequency > 2.0 GHz Typical
    • Maximum Input Data Rate > 2.0 Gb/s Typical
    • 500 ps Typical Propagation Delay
    • Operating Range: VCC = 2.375 V to 3.8 V; VEE = 3.0 V to 5.5 V; GND = 0 V
    • Q Output will Default LOW with Inputs Open or at GND

    在线购买

    型号制造商描述购买
    MC100EP91DWR2GONTRANSLATOR NECL OUTPUT 20-SOIC 立即购买
    MC100EP91MNR2GONTRANSLATOR NECL OUTPUT 24-QFN 立即购买
    MC100EP91MNGONTRANSLATOR NECL OUTPUT 24-QFN 立即购买
    MC100EP91DWGONTRANSLATOR NECL OUTPUT 20-SOIC 立即购买

    技术资料

    标题类型大小(KB)下载
    AC Characteristics of ECL DevicesPDF896 点击下载
    ECL Clock Distribution TechniquesPDF54 点击下载
    Interfacing Between LVDS and ECLPDF121 点击下载
    Designing with PECL (ECL at +5.0 V)PDF102 点击下载
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 点击下载
    Interfacing with ECLinPSPDF72 点击下载
    Termination of ECL Logic DevicesPDF176 点击下载
    Clock Generation and Clock and Data Marking and Ordering Information GuidePDF71 点击下载

    应用案例更多案例

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