首页产品索引AX2061

    AX2061

    购买收藏
     LCD Driver for Low Multiplex Rates

    制造商:ON

    中文数据手册

    产品信息

    The AX2061 contains an internal 32kHz oscillator. This oscillator is started-up at power on and is used to clock the charge pump for the LCD voltage generation. It can be used to derive the frame clock instead of an input via a device pin.

    The AX2061 has 5 row terminals (COM0—COM4) and 76 segment terminals (SEG0—SEG75), so that it can drive an LCD display with a maximum of 380 (76 x 5) segments. The driving method is 1/1 duty to 1/5 duty dynamic drive with four voltages VSS, VD1, VD2 and VD3. lt is also possible to set static drive. LCD display on/off can be controlled by software.

    The AX2061 can be programmed via a four wire serial interface according SPI using the pins CLK, MOSI, MISO and SEL. When the interface signal SEL is pulled low, a four byte command (T0-T3), followed by a variable length configuration data stream (T4-Tx) is expected on the input signal pin MOSI. Data read from the interface appears on MISO. Reading of most registers is possible but it is never necessary for the functionality of the AX2061. This means that it is optional to connect the MOSI pin to the mater microcontroller.
    • Wide power supply range: from 2.2 V to 3.6 V
    • Low power consumption
    • 4-bit contrast register
    • Selectable row drive configuration: static or 2/3/4/5 row multiplexing
    • 76 x 5-bit RAM for display data storage
    • Internal 32 kHz oscillator
    • Auto-incremented display data loading

    在线购买

    型号制造商描述购买
    AX2061-1-WD1-- 立即购买

    技术资料

    标题类型大小(KB)下载
    LCD Driver for Low Multiplex RatesPDF182 点击下载

    应用案例更多案例

    系列产品索引查看所有产品

    ADA4940-2ADM8324ADA4898-1ADM3252E
    AD7988-1AX-SFAZAD7357AD8017
    AT89C51RC2-SLSUMADG621AD5272ATMEGA8515-16AU
    AD5624AD7156ADM1168AD8332
    AD5749AD7939ADR550AD976A
    Copyright ©2012-2024 hqchip.com.All Rights Reserved 粤ICP备14022951号工商网监认证 工商网监 营业执照